1	SID Receiver overview

Here are the main characteristics of the SID receiver:

• single-channel receiver, tested from 15kHz to 80kHz
• included antenna preamplifier
• active order 4 bandpass filter (bandwidth of less than 200Hz for stations below 30kHz)
• measurement of the RMS amplitude
• linear output (not dB), offset setting
• 12-bits ADC
• USB interface
• power supply included

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Synoptic

1	Printed Circuit Board

A small quantity of high quality printed circuits boards for the SID receiver have been manufactured.
The author offers those boards for 30 euros plus shipping costs.
Please contact me for availability.

The printed circuit board is out of stock. Production of another batch is not planned.

Here is a picture of the board:

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Tuning

The tuning of the receiver needs a signal generator and a spectrum analyser or an oscilloscope. Thanks to the low frequencies involved, one can use a sound card offering a sampling frequency of 96kHz or 192kHz. For a few tens of dollars, you have all hardware required to tune the receiver...
Download Spectrum Lab, an Audio Spectrum Analyzer that offers all functionalities for our purpose and much more. The explanations here below assume the reader has a good knowledge of this software.

First, disconnect JP1 and JP3 to isolate the tuning section.
Set Spectrum Lab to generate a noise (level about -72dB). This is done through the 'Test Tone Generators' function in the View/Windows menu.
Set Spectrum Lab so that one channel of the frequency analyser is associated to the output of the signal generator (left channel) and the other is associated to the external signal input. This is done through the 'Spectrum Lab Components' function in the View/Windows menu.

Connect signal output to test point IN.
Connect the test_point MID to the input of the frequency analyser.
Adjust R102A3 so that the peak of the bandpass filter is at the desired frequency.
See the example below for a 23.4kHz frequency. The left part of the graph is the noise. The right part is the output of the first 2nd-order section of the MAX275.

Connect the test_point OUT to the input of the frequency analyser.
Adjust R102B3 so that the peak of the bandpass filter is at the desired frequency.
See the example below for a 23.4kHz frequency. The left part of the graph is the noise. The right part is the output of the second 2nd-order section of the MAX275.

Finally, disconnect the signal generator and reconnect JP1. Connect the antenna and set one input of the frequency analyser (left channel) to IN. Set the other input (right channel) to OUT. Check that the relevant station is actually selected.
See the example below for a 23.4kHz frequency. The left part of the graph corresponds to the signal at the output of the RF pre-amplifier with several VLF transmitters. The right part correspond to the output of the tuning section with only the signal of the selected station.

The last steps consist in setting the 'RF gain' (R007, R010) and post amplifier gain (R203, JP4/JP5) and the offset (R504) so that the full range of the ADC converter is used. When no signal is present, the output should be close to zero (a few hundreds of mV at most). The signal level at mid-day should be around 1.5 to 2V.

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Assembly

Last step is to put the PCB in a metallic box with the transformer, fuse and power switch.
See the pictures here below for assembly example:

1	Data Transfer Protocol

Here are some details regarding the data transfer protocol between the MAX187 and the RS-232 interface.

The MAX187 signals are connected to the following RS-232 pins:

• /CS ↔ RTS
• SCLK ↔ DTR
• DSR ↔ DOUT

The RS-232 standard defines the positive voltage levels for logic one and negative voltage level for logic zero.

Protocol is detailed in the following documents:

•  MAX187 Datasheet
•  Maxim application note 827. This note contains a C code example.

The overall sequence is described below:

• Unset RTS (RTS=-5V; /CS='1') to deselect MAX187
• Set DTR (DTR=+5V; SCLK='0')
• Set RTS (RTS=+5V; /CS='0') to select MAX187. This starts the conversion.
• Wait till the conversion is done (DOUT must be '1'; DSR=-5V)
• Clock in 12 bits. MSB are first:
  • Unset DTR (DTR=-5V; SCLK='1')
  • Set DTR (DTR=+5V; SCLK='0')
  • Read a bit (signal DOUT, DSR)
• Add a 13^th falling edge:
  • Unset DTR (DTR=-5V; SCLK='1')
  • Set DTR (DTR=+5V; SCLK='0')
• Unset RTS (RTS=-5V; /CS='1') to deselect MAX187
• Unset DTR (DTR=-5V; SCLK='1')